IE_stm32_uart.h

/*
 **********************************************************************
 *name:         IE_stm32_uart.h
 *author:       Samuel Igwe
 *date:         07/16/2013
 *description:  Igbo Embedded stm32_uart header
 **********************************************************************
 */
#ifndef IE_STM32_UART
#define IE_STM32_UART


#define PTR_STM32_UART1_BASE                            0x40013800
#define PTR_STM32_UART2_BASE                            0x40004400
#define PTR_STM32_UART3_BASE                            0x40004800
#define PTR_STM32_UART4_BASE                            0x40004c00


/*
 **********************************************************************
 *uart status register
 **********************************************************************
 */
#define PTR_STM32_UART1_SR      (volatile unsigned int *)(PTR_STM32_UART1_BASE + 0)
#define PTR_STM32_UART2_SR      (volatile unsigned int *)(PTR_STM32_UART2_BASE + 0)
#define PTR_STM32_UART3_SR      (volatile unsigned int *)(PTR_STM32_UART3_BASE + 0)
#define PTR_STM32_UART4_SR      (volatile unsigned int *)(PTR_STM32_UART4_BASE + 0)
        #define STM32_UART_SR_CTS                       (1 << 9)
        #define STM32_UART_SR_LBD                       (1 << 8)
        #define STM32_UART_SR_TXE                       (1 << 7)
        #define STM32_UART_SR_TC                        (1 << 6)
        #define STM32_UART_SR_RXNE                      (1 << 5)
        #define STM32_UART_SR_IDLE                      (1 << 4)
        #define STM32_UART_SR_ORE                       (1 << 3)
        #define STM32_UART_SR_NE                        (1 << 2)
        #define STM32_UART_SR_FE                        (1 << 1)
        #define STM32_UART_SR_PE                        (1 << 0)
                


/*
 **********************************************************************
 *uart data register
 **********************************************************************
 */
#define PTR_STM32_UART1_DR      (volatile unsigned int *)(PTR_STM32_UART1_BASE + 4)
#define PTR_STM32_UART2_DR      (volatile unsigned int *)(PTR_STM32_UART2_BASE + 4)
#define PTR_STM32_UART3_DR      (volatile unsigned int *)(PTR_STM32_UART3_BASE + 4)
#define PTR_STM32_UART4_DR      (volatile unsigned int *)(PTR_STM32_UART4_BASE + 4)
        #define STM32_UART_DR_MASK                      (0x1ff << 0)


        
/*
 **********************************************************************
 *uart baud rate register
 *using a 72Mhz clock and a baudrate of 115200 means this register
 *should be set to 0x291
 **********************************************************************
 */
#define PTR_STM32_UART1_BRR     (volatile unsigned int *)(PTR_STM32_UART1_BASE + 8)
#define PTR_STM32_UART2_BRR     (volatile unsigned int *)(PTR_STM32_UART2_BASE + 8)
#define PTR_STM32_UART3_BRR     (volatile unsigned int *)(PTR_STM32_UART3_BASE + 8)
#define PTR_STM32_UART4_BRR     (volatile unsigned int *)(PTR_STM32_UART4_BASE + 8)
        #define STM32_UART_BRR_DIV_MANTISSA_OFFSET      4
        #define STM32_UART_BRR_DIV_MANTISSA_MASK        (0x0fff << 4)

        #define STM32_UART_BRR_DIV_FRACTION_OFFSET      0
        #define STM32_UART_BRR_DIV_FRACTION_MASK        (0x0f << 0)



/*
 **********************************************************************
 *uart control register1
 **********************************************************************
 */
#define PTR_STM32_UART1_CR1     (volatile unsigned int *)(PTR_STM32_UART1_BASE + 12)
#define PTR_STM32_UART2_CR1     (volatile unsigned int *)(PTR_STM32_UART2_BASE + 12)
#define PTR_STM32_UART3_CR1     (volatile unsigned int *)(PTR_STM32_UART3_BASE + 12)
#define PTR_STM32_UART4_CR1     (volatile unsigned int *)(PTR_STM32_UART4_BASE + 12)
        #define STM32_UART_CR1_UE                       (1 << 13)
        #define STM32_UART_CR1_M                        (1 << 12)
        #define STM32_UART_CR1_WAKE                     (1 << 11)
        #define STM32_UART_CR1_PCE                      (1 << 10)
        #define STM32_UART_CR1_PS                       (1 << 9)

        #define STM32_UART_CR1_PEIE                     (1 << 8)
        #define STM32_UART_CR1_TXEIE                    (1 << 7)
        #define STM32_UART_CR1_TCIE                     (1 << 6)
        #define STM32_UART_CR1_RXNEIE                   (1 << 5)
        #define STM32_UART_CR1_IDLEIE                   (1 << 4)

        #define STM32_UART_CR1_TE                       (1 << 3)
        #define STM32_UART_CR1_RE                       (1 << 2)
        #define STM32_UART_CR1_RWU                      (1 << 1)
        #define STM32_UART_CR1_SBK                      (1 << 0)



/*
 **********************************************************************
 *uart control register2
 **********************************************************************
 */
#define PTR_STM32_UART1_CR2     (volatile unsigned int *)(PTR_STM32_UART1_BASE + 16)
#define PTR_STM32_UART2_CR2     (volatile unsigned int *)(PTR_STM32_UART2_BASE + 16)
#define PTR_STM32_UART3_CR2     (volatile unsigned int *)(PTR_STM32_UART3_BASE + 16)
#define PTR_STM32_UART4_CR2     (volatile unsigned int *)(PTR_STM32_UART4_BASE + 16)
        #define STM32_UART_CR2_LINEN                    (1 << 14)

        #define STM32_UART_CR2_STOP_OFFSET              12
        #define STM32_UART_CR2_STOP_MASK                (0x3 << 12)
        #define STM32_UART_CR2_STOP_1_BIT               0
        #define STM32_UART_CR2_STOP_0P5_BIT             1
        #define STM32_UART_CR2_STOP_2_BIT               2
        #define STM32_UART_CR2_STOP_1P5_BIT             3

        #define STM32_UART_CR2_CLKEN                    (1 << 11)
        #define STM32_UART_CR2_CPOL                     (1 << 10)
        #define STM32_UART_CR2_CPHA                     (1 << 9)
        #define STM32_UART_CR2_LBCL                     (1 << 8)
        #define STM32_UART_CR2_LBDIE                    (1 << 6)
        #define STM32_UART_CR2_LBDL                     (1 << 5)
        #define STM32_UART_CR2_ADD_OFFSET               0
        #define STM32_UART_CR2_ADD_MASK                 (0x0f << 0)
        


/*
 **********************************************************************
 *uart control register3
 **********************************************************************
 */
#define PTR_STM32_UART1_CR3     (volatile unsigned int *)(PTR_STM32_UART1_BASE + 20)
#define PTR_STM32_UART2_CR3     (volatile unsigned int *)(PTR_STM32_UART2_BASE + 20)
#define PTR_STM32_UART3_CR3     (volatile unsigned int *)(PTR_STM32_UART3_BASE + 20)
#define PTR_STM32_UART4_CR3     (volatile unsigned int *)(PTR_STM32_UART4_BASE + 20)
        #define STM32_UART_CR3_CTSIE                    (1 << 10)

        #define STM32_UART_CR3_CTSE                     (1 << 9)
        #define STM32_UART_CR3_RTSE                     (1 << 8)
        #define STM32_UART_CR3_DMAT                     (1 << 7)
        #define STM32_UART_CR3_DMAR                     (1 << 6)

        #define STM32_UART_CR3_SCEN                     (1 << 5)
        #define STM32_UART_CR3_NACK                     (1 << 4)
        #define STM32_UART_CR3_HDSEL                    (1 << 3)
        #define STM32_UART_CR3_IRLP                     (1 << 2)
        #define STM32_UART_CR3_IREN                     (1 << 1)
        #define STM32_UART_CR3_EIE                      (1 << 0)



/*
 **********************************************************************
 *uart control register3
 **********************************************************************
 */
#define PTR_STM32_UART1_GTPR    (volatile unsigned int *)(PTR_STM32_UART1_BASE + 24)
#define PTR_STM32_UART2_GTPR    (volatile unsigned int *)(PTR_STM32_UART2_BASE + 24)
#define PTR_STM32_UART3_GTPR    (volatile unsigned int *)(PTR_STM32_UART3_BASE + 24)
#define PTR_STM32_UART4_GTPR    (volatile unsigned int *)(PTR_STM32_UART4_BASE + 24)
        #define STM32_UART_CR3_GT_OFFSET                8
        #define STM32_UART_CR3_GT_MASK                  (0x0ff << 8)

        #define STM32_UART_CR3_PSC_OFFSET               0
        #define STM32_UART_CR3_PSC_MASK                 (0x0ff << 0)
        


#endif