Phase 3: Overview

On the agenda:
1. setting up the Memory Protection Unit

2. configuring the External Memory Controller for SDRAM and SRAM access

3. debugging my Xmodem function and using it to retrieve files from the host written into SDRAM
    note: consider adding a cksum calculation routine in the monitor program that can be accessed with the command "cksum base_addr length"

4. verilog code for the lattice XP2 fpga to implement address decode and glue logic. Ill know this works when I can control LEDs D4-D7 connected to the FPGA  but through the LPC1778. I have already started re-reading "A Verilog HDL Primer" by J Bhasker.


5. its also at this point that I want to put in support for LPC1778 access to the cypress USB controller - through the lattice XP2 fpga.

6. this is all after I verify that I can download bit streams to the lattice part from the ft2232