Phase 1: No external clock

ran into the following problem last night when I ran my initialization code, that I decided to manually check this out myself:

arm-none-eabi-gdb
JTAG tap: lpc1788.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Only resetting the Cortex-M core, use a reset-init event handler to reset any peripherals or configure hardware srst support.
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x1fff0080 msp: 0x10001ffc

(gdb) monitor mdw 0x400fc1b0
0x400fc1b0: 00000003
(gdb) monitor mdw 0x400fc1a0
0x400fc1a0: 00000009
(gdb) monitor mww 0x400fc1a0 0x39
(gdb) monitor mdw 0x400fc1a0
0x400fc1a0: 00000039
(gdb)

Basically after setting bits 4 and 5 of the system control register I checked to see if bit 6 (OSC status) would return a 1 ... meaning the external crystal/clock driver is enabled and I can switch clock sources from the internal 8Mhz RC clock to the precise 24Mhz external clock source Ill need later.

No dice

Looked at section 3.8.2 of the lpc1778 reference manual. Noticed that Cx1 and Cx2 should be either 18pf each or 39pf each depending on what the crystal (JF VNY 24Mhz) Cs and Rl parameters are.

Brought up my schematic and noticed this mistake:

Dont know what I was thinking when I put in a 12pf capacitor where an 18pf or 39pf cap was needed. Knowing my luck its probably the latter ... Ill know once I track down the crystal data sheet.

In either case I bought both on ebay (50 of each) but it wont get here until at least another two or three weeks ($1.50 for 50 ... cheaper from China but long wait times. I could have gotten it from Mouser but I dont need it that quick).

Fortunately all isnt lost. I dont need a precise time piece for well into Phase 3 when I start configuring the USB and External Memory controller blocks. And the lpc1778 provides an 8Mhz RC clock on chip for simple applications ... use able well into developing the terminal monitor program