Monday, September 28, 2015

Phase 2: waste not want not

Its funny because I am involved in a bunch of projects and I cycle through them as time permits. Just recently got back to EGWU ... I had already written the uart code and monitor program but couldnt reliable test it until I had fixed my voltage regulation problem.

THE PROBLEM IS THAT THE 5V AND 3.3V REGULATORS ARE STILL RUNNING INCREDIBLY HOT. SO MUCH SO I COULDNT KEEP A THUMB ON IT FOR LONGER THAN A SECOND

alas there is NO immediate fix other than a more sensible redesign (perhaps with TO-220 parts and heatsinks and larger copper pour area or with switching regulators). Ill deal with that in the next revision of the design and layout.

Last week my office tossed out two p4 PC's and I salvaged their power supplies. I figured Id use them to generate 5v and 3.3v reliably so I can get on with firmware and fpga development.

This evening I removed the 3.3v and 5v regulators (ams1117 parts) and soldered in 1 pin headers for 5v, 3.v and gnd at the P2/P3/P31 test points. Thus the wisdom in adding those test points during the layout.

Then I went online and grabbed the pin out for the 20 pin ATX motherboard power connector and dug into the PSU box with cutters and my soldering iron.

NOTE: the green wire must be grounded for the power supply to turn on. its designated PS/ON . ALSO some pin positions have both large and small wires - both must be connected to together for the PSU to work.

The color coding is simple
black  = common ground
green  = PS/ON (must be connected to ground)
red      = +5v
orange = +3.3v

Thats all I need, pics below.






Next post resumes software/firmware development

Friday, September 11, 2015

Phase 2: component replacement on backup board

So I have two boards at home. One populated with test points inserts and the other without. I have been using the latter, but I needed to probe some signals and mothballed it for now to use the other one.

So, I found a short on the former that was causing eratic behavior ... and something in excess of 4 volts on the output of the 3.3v regulator. Why that hadnt damaged all my 3.3v chips I shall never know.

Further analysis revealed the AMS1117 3.3v regulator was damaged and I figured that the DC adapter connector may have contributed to this. I had already replaced it once so I tore it out as well.

Used the hot air gun to replace the SOT* regulator and my soldering iron to replace the DC adapter. I had damaged the pad and trace to VCC_in on the
connector that I ran a wire through to the two regulators (3.3v and 5v) fed by VCC_in

Then used the continuity tester to verify the 3.3v regulator wasnt shorted between two pins

Pcb layout and component/solder side pics below.










Note to self:
be wary of multi voltage (aka Universal AC/DC) adapters. Two of the three I have (Electrix - UL certified) were producing incorrect output voltages for the various switch settings. At switch setting 9v ... dc meter read 12.7v. A the setting of 12v it was reading out 17.1v on my dmm

DITCH the stupid universal AC/DC adapters!!!
Stick with the 7.5v/1.5A regulated wall adapters I stocked specifically for this project

Tuesday, September 8, 2015

Phase 2: There and back again

the problem was really openocd 0.9.0 (and also 0.8.0) both of which are flaky with the JLINK and OLIMEX Jtag tiny adapters. I tested this on the olimex_stm32_h103.cfg board. on the other hand, openocd 0.7.0 had no issues, with either the ft2232 or the ftdi configuration files.

Oddly enough 0.7.0 was what I was using a few years ago when I was developing firmware for the stm32 series

so I rebuilt it this afternoon and thats what I am going to be using going forward:
sudo ./configure --enable-ftdi --enable-ft2232_libftdi --enable-ioutil --enable-jlink --enable-usbprog


also here is a copy of the /etc/udev/rules.d/99-openocd.rules
This makes running openocd with sudo privileges unnecessary. Note that the user has to be a member of group "plugdev" in order to use this

# Copy this file to /etc/udev/rules.d/

ACTION!="add|change", GOTO="openocd_rules_end"
SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end"

# Please keep this list sorted by VID:PID

# opendous and estick
ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="204f", MODE="664", GROUP="plugdev"

# Original FT232/FT245 VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev"

# Original FT2232 VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev"

# Original FT4232 VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="664", GROUP="plugdev"

# Original FT232H VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="664", GROUP="plugdev"

# DISTORTEC JTAG-lock-pick Tiny 2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="664", GROUP="plugdev"

# TUMPA, TUMPA Lite
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="664", GROUP="plugdev"

# XDS100v2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="a6d0", MODE="664", GROUP="plugdev"

# Xverve Signalyzer Tool (DT-USB-ST), Signalyzer LITE (DT-USB-SLITE)
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca1", MODE="664", GROUP="plugdev"

# TI/Luminary Stellaris Evaluation Board FTDI (several)
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"

# TI/Luminary Stellaris In-Circuit Debug Interface FTDI (ICDI) Board
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="664", GROUP="plugdev"

# egnite Turtelizer 2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bdc8", MODE="664", GROUP="plugdev"

# Section5 ICEbear
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c140", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="664", GROUP="plugdev"

# Amontec JTAGkey and JTAGkey-tiny
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev"

# TI ICDI
ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="664", GROUP="plugdev"

# STLink v1
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="664", GROUP="plugdev"

# STLink v2
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="664", GROUP="plugdev"

# STLink v2-1
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", MODE="664", GROUP="plugdev"

# Hilscher NXHX Boards
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="664", GROUP="plugdev"

# Hitex STR9-comStick
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="664", GROUP="plugdev"

# Hitex STM32-PerformanceStick
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="664", GROUP="plugdev"

# Amontec JTAGkey-HiSpeed
ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="664", GROUP="plugdev"

# IAR J-Link USB
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0101", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0102", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0103", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0104", MODE="664", GROUP="plugdev"

# J-Link-OB (onboard)
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0105", MODE="664", GROUP="plugdev"

# Raisonance RLink
ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="664", GROUP="plugdev"

# Debug Board for Neo1973
ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="664", GROUP="plugdev"

# Olimex ARM-USB-OCD
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="664", GROUP="plugdev"

# Olimex ARM-USB-OCD-TINY
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="664", GROUP="plugdev"

# Olimex ARM-JTAG-EW
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="001e", MODE="664", GROUP="plugdev"

# Olimex ARM-USB-OCD-TINY-H
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev"

# Olimex ARM-USB-OCD-H
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002b", MODE="664", GROUP="plugdev"

# USBprog with OpenOCD firmware
ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="664", GROUP="plugdev"

# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="664", GROUP="plugdev"

# Marvell Sheevaplug
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="664", GROUP="plugdev"

# CMSIS-DAP compatible adapters
ATTRS{product}=="*CMSIS-DAP*", MODE="664", GROUP="plugdev"

LABEL="openocd_rules_end"

Monday, September 7, 2015

Phase 2: Adjustment to openocd and gdb scripts related to various clock and delay values

So this is basically a deviation from my default script. I was dealing with remotetimeout and communication errors with the microcontroller and ft2232 USB-jtag interface (MPSSE) that I decided to modify the clock and delay parameters for openocd ... with rather conservative values. and to set the remotetimeout under gdb to 3 seconds.

Here are the changed files

/home/rombios/.gdbinit
set history filename ~/.gdb_history
set history save
target remote localhost:3333
set remotetimeout 3000
monitor reset halt
#load


egwu_board.cfg
# egwu_board.cfg

set WORKAREASIZE 0x10000
source [find target/egwu_target_1788.cfg]


egwu_interface_usb.cfg
#
# embedded projects openocd usb adapter v3
#
# http://shop.embedded-projects.net/index.php?module=artikel&action=artikel&id=14
#
interface ftdi
ftdi_vid_pid 0x0403 0x6010
#ftdi_channel     0
#ftdi_layout_init 0x1000 0x3d1b
#working ftdi_layout_init 0x0008 0x000b
ftdi_layout_init 0x1000 0x3d0b
ftdi_layout_signal nTRST -data 0x0010


egwu_target_1788.cfg
# egwu_target_1788.cfg
set CHIPNAME lpc1788
set CPUTAPID 0x4ba00477
set CPURAMSIZE 0x10000
set CPUROMSIZE 0x80000

# CCLK is the core clock frequency in KHz

set CCLK 24000
source [find target/egwu_target_17xx.cfg];
#cortex_m reset_config sysresetreq
cortex_m reset_config trst_only


egwu_target_17x.cfg
# egwu_target_17xx.cfg

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
error "_CHIPNAME not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
}

# After reset the chip is clocked by the ~4MHz internal RC oscillator.
# When board-specific code (reset-init handler or device firmware)
# configures another oscillator and/or PLL0, set CCLK to match; if
# you don't, then flash erase and write operations may misbehave.
# (The ROM code doing those updates cares about core clock speed...)
#
# CCLK is the core clock frequency in KHz
if { [info exists CCLK] } {
set _CCLK $CCLK
} else {
set _CCLK 24000
}

if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
error "_CPUTAPID not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
}

if { [info exists CPURAMSIZE] } {
  set _CPURAMSIZE $CPURAMSIZE
} else {
error "_CPURAMSIZE not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
}

if { [info exists CPUROMSIZE] } {
  set _CPUROMSIZE $CPUROMSIZE
} else {
error "_CPUROMSIZE not set. Please do not include lpc17xx.cfg directly, but the specific chip configuration file (lpc1751.cfg, lpc1764.cfg, etc)."
}

jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME

# The LPC17xx devices have 8/16/32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000)
$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE

# The LPC17xx devies have 32/64/128/256/512kB of flash memory, managed by ROM code
# (including a boot loader which verifies the flash exception table's checksum).
# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \
lpc1700 $_CCLK calc_checksum

# Run with *real slow* clock by default since the
# boot rom could have been playing with the PLL, so
# we have no idea what clock the target is running at.
adapter_khz  50
#adapter_khz 1000

# delays on reset lines
adapter_nsrst_assert_width 100
adapter_nsrst_delay 100

jtag_ntrst_assert_width 100
jtag_ntrst_delay 100

$_TARGETNAME configure -event reset-init {
mww 0x400FC040 0x01
mww 0xe000ed08 0x10000000
}

# perform a soft reset
#cortex_m reset_config sysresetreq
cortex_m reset_config trst_only