Tuesday, March 17, 2015

EGWU openocd 0.7.0 egwu_target_1788.cfg

use lpc1788 as base line for egwu_target_1788. make necessary modifications

cd /usr/local/share/openocd/scripts/target
cp lpc1788.cfg egwu_target_lpc1788.cfg



# NXP LPC1788 Cortex-M3 with 512kB Flash and 64kB Local On-Chip SRAM,
set CHIPNAME lpc1788
set CPUTAPID 0x4ba00477
set CPURAMSIZE 0x10000
set CPUROMSIZE 0x80000

# After reset the chip is clocked by the ~12MHz internal RC oscillator.
# When board-specific code (reset-init handler or device firmware)
# configures another oscillator and/or PLL0, set CCLK to match; if
# you don't, then flash erase and write operations may misbehave.
# (The ROM code doing those updates cares about core clock speed...)
#
# CCLK is the core clock frequency in KHz
set CCLK 12000

#Include the main configuration file.
source [find target/egwu_target_17xx.cfg];

# if srst is not fitted, use SYSRESETREQ to perform a soft reset
cortex_m reset_config sysresetreq

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